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texample1
32-bit shifter, shifter, 32-bit.Very goog as a study file.
- 2015-10-24 09:44:53下载
- 积分:1
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traffic_lights
用Verilog实现的交通信号灯控制,主干道和支路通行的时间不相等(Using Verilog implementation of traffic signal control, the trunk road and the slip is not the same passage of time)
- 2009-03-28 18:31:31下载
- 积分:1
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car
基于Xilinx公司的ISE软件开发的智能循迹避障小车的源代码,用Verilog语言,传感器有红外传感器以及超声波传感器(Xilinx' s ISE-based software development intelligent car tracking avoidance source code, using Verilog language, the sensor has an infrared sensor and ultrasonic sensors)
- 2015-03-21 18:06:18下载
- 积分:1
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shumaguan
一个数码管的驱动开发程序,程序完备,可以直接使用,在开发板上使用时注意改变引脚(A digital control of the driver development program, the program is complete, can be used directly, when used in the development of attention to change the pin board)
- 2011-02-15 16:46:47下载
- 积分:1
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can_latest.tar
用verilog编写的can总线控制器,包括设计参考历程和仿真程序,以及开发文档!(Written by verilog can bus controller, including the design reference course and simulation program, and the development of the document!)
- 2015-07-23 19:55:03下载
- 积分:1
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基于AHB的SDRAM Verilog代码
该代码为基于AHB总线的SDRAM Verilog代码,对于进一步理解AHB协议有很大帮助,非常适合AMBA的初学者
- 2022-04-27 15:05:28下载
- 积分:1
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last
verilog,FPGA的TDC电路设计(verilog ,TDC base on FPGA)
- 2021-01-04 18:48:54下载
- 积分:1
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verilog___UART
Verilog 编写的串口通信模块 带测试代码(Verilog prepared by the serial communication module with a test code)
- 2012-05-24 20:38:27下载
- 积分:1
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test2
说明: 试用Verilog HDL语言,设计十进制计数器,将计数过程用一个数码管进行显示(0~9)。要求首先使用Modelsim软件进行功能仿真,然后使用Quartus软件综合,并下载到开发板进行电路功能测试。(Using Verilog HDL language, a decimal counter is designed. The counting process is displayed by a digital tube (0 ~ 9). It is required to first use Modelsim software for functional simulation, then use quartus software for synthesis, and download to the development board for circuit functional test.)
- 2020-05-17 11:07:28下载
- 积分:1
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Verilog
用Verilog实现一个基于Mesh拓扑结构的路由器网络(Using Verilog to implement a router network based on Mesh topology)
- 2021-03-25 15:49:14下载
- 积分:1