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AVR_Core.tar
CPLD例程(语言)《Verilog HDL数字控制系统设计实例》AVR_Core.tar.gz-.rar(CPLDprogram dialogue /Verilog language design examples)
- 2011-11-12 20:43:49下载
- 积分:1
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fenpin
这是一个二进制的最简单分频器,是一个简短的fpga代码,用verilog书写(This is the most simple of a binary frequency divider, the fpga is a short code, written in verilog)
- 2013-11-17 15:01:30下载
- 积分:1
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stm32adc12路采集DMA
说明: adc采集多路采集多通道基于dma的adc采集(ADC acquisition, multi-channel acquisition and multi-channel acquisition)
- 2020-06-19 06:20:01下载
- 积分:1
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ZBT SRAM控制器参考设计,xilinx提供,(ZBT SRAM是一种高速同步SRAM)...
ZBT SRAM控制器参考设计,xilinx提供,(ZBT SRAM是一种高速同步SRAM)-ZBT SRAM controller reference design for Xilinx (ZBT SRAM, a high-speed synchronous SRAM)
- 2023-03-10 04:20:03下载
- 积分:1
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fir
该程序实现了一个FIR滤波加速器,该程序在FPGA板上开发,通过使用VHDL语言来定义RS232端口的使用(design a FIR Filter Accelerator based on FPGA board and RS232 interface using VHDL language. )
- 2013-06-07 06:27:32下载
- 积分:1
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basic_cpu_mano_ise_vhdl
morris mano basic vhdl code in ise
- 2014-01-13 05:52:01下载
- 积分:1
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Timing_Closure
详细讲解时序约束培训教材,有利于更好对时序约束的理解(Timing constraints elaborate training materials, facilitate better understanding of the timing constraints)
- 2010-08-12 20:02:33下载
- 积分:1
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分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序 FRFT Ozaktas
这是分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序,FPGA是Xilinx的virtecx-5,这是我在做毕业设计的时候自己编写的,希望能对你有帮助!(This is the fractional Fourier transform algorithm FRFT Turkish FPGA implementation of the program, FPGA is the Xilinx virtecx-5, which is what I was doing graduate design time I have written, I hope you can help!)
- 2021-03-12 10:49:25下载
- 积分:1
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day8_alu_design
this is verilog code for designing ALU in fpga.
- 2014-05-29 00:19:27下载
- 积分:1
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DE2 FPGA盒
FPGA KIT DE2-35
This project outputs a selected voltaje using VGA DAC, the DAC module is controlled using LCD display and buttons.
- 2022-12-31 09:25:04下载
- 积分:1