可以在Verilog HDL及其测试代码协议实现

基于FPGA的DM9000A芯片的网络数据采集系统，基于NIOS架构，c语言编程，资料齐全，包含不止5个源程序，绝对受用！(FPGA-based the DM9000A chip network data acquisition system based on NIOS architecture, c programming language, the information is complete, contains more than 5 source code is absolutely good enough!)

说明：  使用vivado和Xilinx开发板实现抢答器，开发板为Xilinx Artix-7(Using vivado and Xilinx development board to achieve the responder, the development board is Xilinx artix-7)

对一个256长度的，数据为0-9的数据序列，进行哈夫曼编码。

quartus license dede(quartus 11.0 license)

FPGA驱动高输入电压范围的ADS8509芯片，采样范围广，适合前端大信号处理(FPGA drive a high input voltage range ADS8509 chip, sampling a wide range, suitable for large front-end signal processing)

通过随机数产生原理进行verilog编程，从而实现FPGA的随机数产生(Through random number generation principle for Verilog programming, so as to achieve the FPGA random number generation)

完整的Verilog验证模型，包括设备完整的状态。(Complete verilog Verification Model)

说明：  基於空間向量調變的開關法，在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)

IEEE1588de FPGA 程序，已测试，可直接用，方便(IEEE1588de FPGA program has been tested, can be directly used to facilitate)

说明：  串口通信vivado实现，带有仿真文件，可实现数据收发(the uart program based on vivado)