用VHDL语言实现数字钟的设计

基于研华采集卡的FIFO双缓存区高速数据采集(FIFO DAQ)

关于硬件描述语言Verilog的135个经典实例，从易到难，对Verilog的编程有很大的帮助。(About the Verilog hardware description language 135 classic example, from easy to difficult, for Verilog programming of great help.)

verilog实现DLX指令集5段流水线(5 stage DLX pipeline implemented in verilog)

从github下载的，能够参考设计AXI4的协议接口(AXI4 Verilog template)

用于sopc builder添加组件用的ps/2 键盘 ipcore-Sopc builder used to add components used ps/2 keyboard IPCore

基于FPGA cyclone III EP3C16F484C6的俄罗斯方块游戏。实现双人进行，屏幕倒置，分数显示，vga接口，键盘接口等功能(Tetris game based on FPGA cyclone III EP3C16F484C6 with functions including double players, screen upside down, score, vga and keyboard interface.)

SPI verilog RTL code

基于FPGA的点灯游戏，完整工程。包括鼠标控制，键盘控制，SVGA显示等(Light game based on FPGA, the whole project which includes keyboard control, SVGA and so on.)

2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发(Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development)

FPGA通过SPI总线配置AD采集芯片AD9648的程序，Verilog实现 (FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization)