多周期CPU设计包括basys3板的设计

基于FPGA开发的均值滤波程序，效率很高，非常有用(Based on FPGA development of the mean filter program)

实现在屏幕上显示绿色和红色相间的水平条纹。其中，vga_640x480模块将产生行同步信号hsyn和场同步信号 vsync; vga_stripes模块将产生red、green和blue三个输出。(The horizontal stripes of green and red are displayed on the screen. Among them, vga_640x480 module will produce line synchronization signal Hsyn and field synchronization signal vsync; vga_stripes module will produce red, green and blue three outputs.)

详细讲解时序约束培训教材，有利于更好对时序约束的理解(Timing constraints elaborate training materials, facilitate better understanding of the timing constraints)

上下LED计数器

说明：  基于fpga的DDS程序 可输出正弦波 方波 三角波 锯齿波(DDS program based on FPGA can output sinusoidal square wave triangular wave sawtooth wave)

fpga 控制ad7606，编写代码用verilog语言，实现采集函数发生器

This is an UART real time clock

AHB_slave_verilog_code

说明：  用于FPGA设计的代码（Verilog代码），在FPGA设计中的高速串并转换，时钟提取，对齐处理等功能(for FPGA design ,written by Verilog HDL the functions include SERDES , CDR and so on)

基于FPGA/EP2c5的开发板详细例程，内容丰富，简单易懂(Development board based on more routine FPGA/EP2c5, content rich, easy to understand)