登录
首页 » Verilog » FPGA控制PWM的程序

FPGA控制PWM的程序

于 2022-10-13 发布 文件大小:9.10 MB
0 135
下载积分: 2 下载次数: 1

代码说明:

FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序FPGA控制PWM的程序

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • sp6ex7
    说明:  ISE与Modelsim联合仿真库编译与关联设置。(ISE and Modelsim joint simulation library compilation and associated settings.)
    2020-07-03 14:17:10下载
    积分:1
  • DAC2902
    verilog编写的DAC2902程序,用于高速的数模转换(verilog language,using for DAC2902 digital analog converter)
    2011-08-07 14:29:54下载
    积分:1
  • spi_2
    说明:  DAC3283 寄存器初始化,SPI驱动(Dac3283 register initialization, SPI drive)
    2020-03-14 09:56:50下载
    积分:1
  • dingshi
    定时器加数码管显示源码,以及test bench测试模块源码,经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)
    2013-07-27 10:34:41下载
    积分:1
  • uart蓝牙控制小车
    通过串口协议来实现蓝牙数据传输,可通过手机与蓝牙模块之间的传信实现对小车的控制
    2023-01-11 08:30:04下载
    积分:1
  • XilinxISE9.2andChinpScopePro9.2Sn
    Xilinx ISE 9.2 and ChinpScope Pro 9.2 Sn
    2021-03-29 15:29:11下载
    积分:1
  • OFDM-analysis-and-simulation
    实现了光OFDM模块的各个功能,同时仿真分析了OFDM的载波幅度谱、相位谱、每个载波对应的时域信号、整个时域/频域的OFDM、每个接收符号的分布图。计算了相位差等等(To achieve the various functions of the optical OFDM module, the simulation analysis of the the the OFDM carrier amplitude spectrum and phase spectrum, and the time domain signal corresponding to each carrier, the whole time domain/frequency domain OFDM, each reception symbol maps. Calculated phase difference)
    2020-10-17 16:17:28下载
    积分:1
  • zhentongbu
    FPGA在通信上的运用:基于VHDL的帧同步程序(Application of FPGA in communication: Based on VHDL frame synchronization procedures )
    2012-11-28 09:10:05下载
    积分:1
  • LFM
    该程序使用Verilog语言产生LFM信号(The program uses Verilog language to generate LFM signals.)
    2021-04-19 09:38:51下载
    积分:1
  • 基于FPGA的多路同步脉冲发生器设计1
    说明:  采用FPGA(现场可编程门序列)编写VHDL语言设计多路同步脉冲发生器,对信号进行分频处理,实现四路信号相位相差T/16和T/8的延迟相位输出,实现的四路脉冲与传统的脉冲同步器不同,它具有高集成度,高通用性,容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide the frequency of the signal, to achieve the four-way signal phase difference T / 16 and T / 8 delay phase output, the realization of the four-way pulse is different from the traditional pulse synchronizer, it has the characteristics of high integration, high-throughput, easy adjustment and high reliability.)
    2020-03-18 20:52:05下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载