fpga Verilong 实现以太网

脉动乘法器：一个GF(2m)域上的Digit-Serial 脉动结构（Systolic）的乘法器(Pulse Multiplier: a GF (2m) domain on the Digit-Serial pulsation structure (Systolic) the multiplier)

cvery high compatibles for quartus

verilog vga 图像处理(verilog vga)

交通信号灯 Verilog编写 硬件实现交通信号灯的控制

能够完美产生数字地面电视（DTMB）的信源的程序。帧头模式为模式一。信道可选择，信号加入频偏，延时，后经滤波器后输出。(Able to produce perfect digital terrestrial television (DTMB) of the source program. Mode is the mode a header. Channels to choose from, the signal adding offset, delay, after the filter output.)

采用verilog语言基于查找表描述8b10b编码源代码(Using Verilog language to describe 8B10B encoding source code based on look-up table)

DE2使用手册，介绍DE2的所有组成元件，使用方法，还有相应的实例。(DE2 User Manual, describes all the components DE2 components, using the method, there is a corresponding instance.)

测试过可用的SD仿真模型，VERILOG语言(SD card simulation modle, test OK)

有限状态机工作原理、设计方法、步骤等精要说明(Finite state machine working principle, design method, such as Essentials of steps to explain)

verilog xilinx IP实现FFT仿真(Verilog xilinx IP implementation FFT simulation)