基于fpga的vga输出灰阶测试图片

关于i2c master/slaver control 方面的技术资料 介绍其特色与使用方法(On the i2c master/slaver control of technical information on their characteristics and use)

用窗函数法设计一个线性相位FIR数字低通滤波器，用理想低通滤波器作为逼近滤波器，通带截止频率为0.2 ，阻带截止频率为0.4 ，阻带衰减不小于-40dB。(Window function method to design a linear phase FIR digital low-pass filter, as an ideal low-pass filter for approximation filter passband cutoff frequency of 0.2 stopband cutoff frequency of 0.4, the stop-band attenuation of less than-40dB.)

说明：  ad 9226 数据采集芯片的 FPGA 实现，FPGA 对数据的采集准确，通过仿真和实测(The FPGA implementation of ad9226 data acquisition chip,FPGA data acquisition accuracy, through simulation and measurement.)

verilog实现彩灯控制、数码管循环显示1～8、1010序列检测器，代码在文件里

数字电路的设计。以软件方式实现硬件电路，功能强大，开发容易。(Digital circuit design. With software to realize the hardware circuit, powerful, development easy. )

VHDL由简单存储器，计数器等搭建最终实现8位的cpu设计(VHDL realization 8 of cpu design)

广东工业大学硕士论文《SVPWM算法优化及其FPGA/CPLD实现》，在详细分析经典SVPWM算法基础上，提出一种优化算法，并在FPGA上实现。论文附录包含VHDL源码。(Guangdong University Thesis " SVPWM algorithm to optimize its FPGA/CPLD realization" in the detailed analysis of the classical SVPWM algorithm is proposed based on an optimization algorithm, and implemented on FPGA. Paper appendix contains VHDL source code.)

xilink DPD V6.0 IP Core design example

高速ADC及DAC接口的参考设计。在Xilinx FPGA上实现。(Reference design of xapp1071.)

说明：  FPGA控制AD7656和模拟开关实现36路模拟量循环采集(FPGA control AD7656 and analog switch to realize 36 channels of analog cyclic acquisition)