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AD5764 verilog hdl 代码,它工作得好
把它写在 verilog hdl 代码中,在我的板测试,效果很好,你可以将它直接复制到您的项目,然后使用它没有任何问题
- 2022-07-07 07:08:04下载
- 积分:1
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flashZ
FPGA控制m25p16flash芯片读写控制spi协议
可实现擦除写入读出功能(SPI protocol for read and write control of m25p16 flash chip controlled by FPGA
Erase Write-Read Function)
- 2018-12-19 16:10:59下载
- 积分:1
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Encoder_SSI_Veryilog
说明: 本文详细描述了SSI协议的通讯格式、原理及应用电路,并采用verilog语言实现了SSI通讯协议.设计实用电路并实现了与绝对值编码器的通讯(SSI protocol described in detail the communication format, principle and application circuit, and use verilog language of the SSI protocol. Practical circuit design and implementation of the communication with the absolute encoder)
- 2020-12-28 20:59:02下载
- 积分:1
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MP3-coder
In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder.
Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them
includes all the VHDL source codes of the component.)
- 2013-08-06 15:40:24下载
- 积分:1
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am
基于FPGA的用verilog语言写的,改程序可产生不同调制系数和不同频率的AM波,长按按键切换调制度25 、50 、75 和短按按键切换调制信号频率1k、1.5k、2k、2.5k.(Based on the FPGA using verilog language, change the program can produce different coefficients and different frequency modulated AM wave, long press the button to switch the modulation of 25 , 50 , 75 and short press button to switch the modulation signal frequency 1k, 1.5k, 2k, 2.5k.)
- 2013-10-14 22:14:56下载
- 积分:1
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vga_ctl_640x480
VGA 640x480 driver in verilog
- 2010-08-16 02:48:43下载
- 积分:1
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FPGA读写CF卡
利用FPGA通过IDE PIO模式实现读写CF卡桥接,可使用ARM或DSP等处理器通过FPGA来CF卡读写CF卡,读数据可以达到30MB/s,写数据10MB/s。
- 2022-02-03 07:14:59下载
- 积分:1
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PCI_Master
pci协议主模块开发实用代码, 适合初级学习者使用 很不错(pci agreement to develop practical code, very good for junior learners)
- 2013-01-10 14:48:24下载
- 积分:1
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RS
说明: 本文设计了基于FPGA的,用verilog HDL语言描述的在伽罗华域GF( )上的RS(6,4)编码器。在ISE软件上用verilog HDL语言分别对每个模块进行描述,然后在软件上进行编译、仿真,最终实现RS(6,4)编码,下载之后用chipscope采集数据,分析符合仿真结果,达到设计的要求。(This paper is designed based on FPGA, described by Verilog HDL language in Galois field GF () on RS (6,4) encoder. Using the ISE software Verilog HDL language for each module is described, and then compile, simulation in software, the ultimate realization of the RS (6,4) encoding, after downloading by chipscope data acquisition, the analysis with the simulation results meet the design requirements.)
- 2017-08-25 17:59:14下载
- 积分:1
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dianzhen
如果需要用verilog设计一项比较简单的功能,那么这个浅显易懂的程序能让你很快明白点阵的设计方法,尤其是对那些初学者(If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners)
- 2014-01-16 16:13:53下载
- 积分:1