CAN总线通信

turbo码的verilog程序，有意者请下载。(turbo code verilog procedures Interested parties please download.)

NiosII的C代码,包括网卡,lcd,usb,串口,按键.(NiosII C code, including network cards, lcd, usb, serial, key.)

从github下载的，能够参考设计AXI4的协议接口(AXI4 Verilog template)

说明：  SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals in various formats. The cores connect using AXI-streams. Most configurations (resolution, framerate, colordepth, etc.) are set at compile-time using Verilog parameters. See svo_defines.vh for details on those parameters.

thesis about design and implementation neural network using FPGA

卷积码编码译码程序以及其modelsim仿真波形文件等(Convolutional code encoding and decoding procedures and the Modelsim simulation waveform file)

FPGA在直流电机调速中的应用,利用fpga进行PID闭环控制(tell us speed control for DC motor by FPGA,use fpga for PID circle control)

LabVIEW FPGA SPI implementation

led学习控制l44444444444444(led verilog led ccccccc)

可以用于学习的示波器读取显示存储简单处理软件~希望可以对各位有用，用Verilog语言编写而成的,顶层加各个模块的分析，都有，希望有用~~~~~~~~~~~~~~~~~~~~~~