SOPC PWM IP

利用stm32F407实现的等精度测频，可以精确测量频率，误差很小(The equal precision frequency measurement realized by stm32F407 can accurately measure frequency with little error.)

is61lv25616简单的verilog程序，完成sram读写(is61lv25616 simple verilog program, complete sram read and write)

完成一个1位全减器的设计。以全减器为元件程序完成8位减法器设计。(Completed a one minus the whole design. Full reduction is to complete eight subtraction element program design.)

里面包含了三段代码，主要是用matlab产生高斯随机信号以及高斯白噪声和色噪声，然后计算其数字特征及对这些信号进行频谱分析和功率谱分析，里面还有关于低通滤波器的设计的简单说明(Which contains three sections of code using matlab Gaussian random signals and white Gaussian noise and color noise, and then to calculate the numerical characteristics and spectral analysis and power spectral analysis of these signals, there is also the low-pass filter design BRIEF DESCRIPTION OF)

说明：  通过verilog hdl语言实现RS编码器与译码器的设计(Verilog hdl language through the RS encoder and decoder design)

FPGA SPI 主要模块全部涵盖 时序解释 与DSP通信(FPGA SPI Timing interpretation covering all main modules communicate with the DSP)

基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)

TD-LTE中（3.1.7）咬尾卷积码编码器verilog代码(Tail-biting convolutional code encoder verilog code)

实现线性反馈移位寄存器的verilog实现(lfsr use verilog for the zip)

800x600@60Hz VGA 时序产生的 Verilog 此外包括一个软件二 13.0 测试项目。在 Altera DE0 开发板执行测试。