基于CPLD的多功能信号发生器设计.PDF

用ZLG7289和数码管组合。显示0~F

DNW0.5G源码及改进的源码.rar修改guid.h文件中//New GUID by purnnamu// {8E120C45-4968-4188-BA19-9A82361C8FA8}DEFINE_GUID(GUID_CLASS_I82930_BULK, 0x8e120c45, 0x4968, 0x4188, 0xba, 0x19, 0x9a, 0x82, 0x36, 0x1c, 0x8f, 0xa8);源码已用vs2005下编译测试过，没问题哦。可适用嵌入式开发板的usb升级使用，亲侧可用。

nrf905在magicARM实验箱上实现的代码 主函数包含了发送和接受的标准函数 驱动包在NRF905文件夹里-nrf905 magicARM experimental box in achieving the main function contains code of the sending and receiving standard function-driven wrapped in paper folders NRF905

一个TAB页，需flnx的支持-a tab pages, the need to support flnx

430编程：19264图形液晶汉字与字符的显示程序，可以直接使用-430 : 19,264 Chinese characters and graphics LCD character display program can be used directly

Altare公司训练新人的练习题下载.rar FPGA/CPLD-Altare company"s new training exercises download. Rar FPGA/CPLD

Example 1 project for AVR8515 on C for IAR

AVR驱动7219程序，能有效将AVR的速度与资源有效利用。程序简洁，流畅，浅显易懂。-AVR-driven 7219 procedures, can effectively AVR speed and efficient use of resources. Process simple, smooth, easy to understand.

FPGA DE2开发板  实验2第一部分VHDL硬件语言练习源码 Part II You are to design a circuit that converts a four-bit binary number V = v3v2v1v0 into its two-digit decimal equivalent D = d1d0. Table 1 shows the required output values. A partial design of this circuit is given in Figure 1. It includes a comparator that checks when the value of V is greater than 9, and uses the output of this comparator in the control of the 7-segment displays. You are to complete the design of this circuit by creating a VHDL entity which includes the comparator, multiplexers, and circuit A (d

一个arm7开发板上的定时器实验程序，此程序用c语言开发。-Development of an on-board timer arm7 experimental procedure, this procedure using c language development.