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1位ADPCM编解码器::概述
音频编码(ADPCM位) ;
- 2022-01-26 03:09:33下载
- 积分:1
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02_基于ZYNQ的SOC入门基础
说明: VIVADO pl端文档 基于zynq 7020(vivado soc pl example text of zynq)
- 2020-06-17 11:40:02下载
- 积分:1
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PIC单片机学习软件及其资料
PIC单片机学习软件及其资料,入门到精通(PIC MCU learning software and its information, entry to proficiency)
- 2019-07-04 17:17:40下载
- 积分:1
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Labview-Data-acquisition-card-
基于labview的数据采集系统,包括示波器和函数信号发生器,可以实现简单数据采集.(Labview-based data acquisition system, including oscilloscopes and function signal generator, can achieve a simple data acquisition.)
- 2014-01-15 21:26:04下载
- 积分:1
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Automatic-washing-machine-controller
全自动洗衣机的控制器。
1.洗衣机的工作步骤为洗衣、漂洗和脱水三个过程,工作时间分别为:洗涤10秒,漂洗5秒,脱水5秒;
2.用一个按键实现洗衣程序的手动选择:A、单洗涤;B、单漂洗;C、单脱水;D、漂洗和脱水;E、洗涤、漂洗和脱水全过程;
3.用显示器件显示洗衣机的工作状态(洗衣、漂洗和脱水),并倒计时显示每个状态的工作时间,全部过程结束后,应提示使用者;
4.用一个按键实现暂停洗衣和继续洗衣的控制,暂停后继续洗衣应回到暂停之前保留的状态;
(Automatic washing machine controller. 1 washing machine work steps for the laundry, rinsing and dehydration three processes, working hours are as follows: washed for 10 seconds, rinse for 5 seconds, dehydrated five seconds 2 with a button to manually select the program to achieve laundry: A, single-washing B, single rinse C, a single dehydration D, rinsing and dehydration E, washing, rinsing and dehydration the whole process 3 with a display device display the working status of washing machine (laundry, rinsing and dehydration), and each state countdown show working hours, after the whole process should prompt the user 4 laundry with a button to pause and continue control of laundry, laundry should be back after a pause pause before continuing to retain the state )
- 2020-11-11 16:29:44下载
- 积分:1
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hamming_encodeadecode
用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错,然后将其纠错译码并输出,详细过程见仿真。(Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and then error correction decoding and output, see the detailed process simulation.)
- 2011-04-22 16:46:39下载
- 积分:1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分:1
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EWB
软件的使用程序并附上开发板的原理图,希望对你是一个很好的帮助!其中内容为:8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,(very good)
- 2009-03-06 12:54:19下载
- 积分:1
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8阶的FIR的Verilog hdl实现
使用matlab的simulink工具滤波器功能实现了FIR系数的计算,同时使用verilog hdl实现了功能仿真,通过调试在Xilinx的ZEDBOARD板子上实现了结果,使得FIR的应用得以在硬件上实现,调试和注解有写。
- 2022-03-24 14:30:01下载
- 积分:1
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BCH3
BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)
- 2021-01-26 11:58:36下载
- 积分:1