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FIR
本实验主要是在FPGA上实现FIR数字滤波器的功能,不仅有工程文件,还具有论文资料。(This experiment mainly realizes the function of FIR digital filter on FPGA, not only has the engineering document, but also has the thesis information.)
- 2020-10-05 11:27:38下载
- 积分:1
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adv7511_hdmi
FPGA与HDMI ADV7511接口源代码(FPGA HDMI Adv7511 interface)
- 2020-10-08 14:37:36下载
- 积分:1
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fifo_rs232
从FIFO到到RS232的实现,用于接收和缓存数据(TripAdvisor RS232 FIFO implementation for receiving data and cache)
- 2016-08-26 13:57:23下载
- 积分:1
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32FIRVHDL
基于FPGA的32阶FIR数字滤波器设计 源程序。设计使用了并行乘法器,运行速度更快,占用内存更小,延迟更小。
(32 order FIR digital filter based on FPGA design source program. Design USES parallel multiplier, faster and less memory, less delay.)
- 2014-05-12 21:11:19下载
- 积分:1
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ps2_interface
封装PS2接口驱动,用verilog编写!适用于键盘,鼠标等PS2接口的器件。(failed to translate)
- 2013-05-05 10:48:42下载
- 积分:1
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12
说明: 用FPGA进行等精度频率和相位差测量的程序,本程序是在EPEC6Q240C8下的程序(Carried out with the FPGA such as the frequency and phase measurement precision of the procedure, this procedure was the procedure under the EPEC6Q240C8)
- 2010-03-03 17:42:11下载
- 积分:1
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fpgaspi
LabVIEW FPGA SPI implementation
- 2013-04-30 00:03:18下载
- 积分:1
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veriloge计算
1.設計一計數器,計算輸入信號(pulse)的高準位有多少個時脈週期,並將計數結果輸出至(cnt_value)。2.使用hw1_tb.v當Top level Testbench 。3.注意cnt_value只能在每次輸入信號(pulse)負緣後變化一次。
- 2022-02-28 22:23:43下载
- 积分:1
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QPSK_1
QPSK调制,QPSK仿真误码率,QPSK理论误码率 , QPSK仿真误比特率 , QPSK理论误比特率 (QPSK modulation, the signal-to-noise ratio)
- 2020-12-06 19:29:22下载
- 积分:1
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weitongbu
基于fpga的位同步信号提取仿真 使用vhdl语言 quartus(To use vhdl language quartus fpga bit synchronization signal extraction-based simulation)
- 2020-12-29 17:29:00下载
- 积分:1