In terms of hardware decimal to binary will be no need to use adder computing th...

说明：  ? 熟悉IIC协议总线协议，采用IIC总线对图像采集传感器寄存器进行配置，并转换为RGB565格式。 ? 利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。 ? 利用 SDRAM 接口模块的设计，实现了刷新、读写等操作；为提高SDRAM 的读写带宽，均采用突发连续读写数据方式；并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。 ? 利用双线性插值方法实现对图像640×480到1024×768的放大操作。 ? 完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format. Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface. With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA. The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768. Complete the VGA display interface design.)

时间设置 可以作为设计中的一个小模块进行使用 方便快捷(time setting)

  基于FPGA(Field-Programmable Gate Array)的OFDM(Orthogonal Frequency Division Multiplexing)信号传输系统VHDL源码 use IEEE.std_logic_unsigned.all; package outconverter is constant stage : natural := 3; constant FFTDELAY:integer:=13+2*STAGE; constant FACTORDELAY:integer:=6; constant OUTDELAY:integer:=9; function counter2addr( counter : std_logic_vector; mask1:std_logic_vector; mask2:std_logic_vector ) return std_logic_vector; function outcounter2addr(counter : std_logic_vector) return std_logic_vector; end outconverter; package body outconverter is function counter2addr( counter : std_logic_vector; mask1:std_logic_vector; mask2:std_logic_vector ) return std_logic_vector is variable result :std_logic_vector(counter"range); begin for n in mask1"range loop if mask1(n)="1" then result( 2*n+1 downto 2*n ):=counter( 1 downto 0 ); elsif mask2(n)="1" and n/=STAGE-1

这是altera公司的DE2-35开发板下的一个PS2键盘的源程序代码工程，包括PS2驱动等模块有需要的人，可以下载(Altera DE2-35 development board of the company, the source code of a PS2 keyboard works, including the the PS2 driver modules need, you can download)

数字逻辑与系统的关于所有的器件74LS的介绍，功能表(Digital Logic and System devices 74LS on the introduction of all the menu)

Verilog语言编写的电话计费系统，这只是源代码，需要在quartusII等软件下运用-Verilog language telephone billing system, this is only the source code, the need to use software such as quartusII

CH2CH1VHDL 数字电路参考书所有程序4-CH2CH1VHDL digital circuit reference all proceedings 4

ASIC Design using VHDL by Shyam Mani

用于FPGA的学习，大家值得借鉴，可以好好学习一下(this is for fpga and you can use this.)

Spartan3e keyboard ps2