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cnv_enc_modify
卷积码(2,1,7)编码器,一个输入,两个输出(Convolution code (2,1,7) encoder, an input and two outputs)
- 2015-05-20 10:21:56下载
- 积分:1
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verilog语言 秒表程序源代码及时序图
用verilog语言详细编写的源代码及顶层文件,含有时序图分析。要求有Quartus2开发环境。
- 2022-05-20 14:07:49下载
- 积分:1
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EDA-Cont-LED-201006
FPGA-CPLD实习计数器7段数码管控制接口设计与LED显示控制,FPGA译码(FPGA-CPLD internship counter 7-segment LED control interface design and LED display control, FPGA decoder)
- 2013-05-11 23:09:25下载
- 积分:1
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I2C Slave AND I2C Master
里面包含I2C Slave以及I2C Master,并且包含仿真程序以及波形文件,本人看了一下,特别好理解
- 2022-01-26 00:49:13下载
- 积分:1
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goodProcessor.srcs
说明: 处理器系统,处理器加上存储器,从存储器取出指令放入处理器执行(processor system, instructions stored in ROM, a counter generate address and the processor execute instructions.)
- 2020-10-10 23:10:02下载
- 积分:1
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maichongceliang
对于已获得的脉冲包络采样序列,需测量的脉冲特征参数主要有:脉冲幅值(PA)、脉冲到达时间(TOA)和脉冲宽度(PW)。实际测量中,脉冲波形的形状是各种各样的,但其主要的参数有脉冲幅度、脉冲宽度、脉冲周期、脉冲占空比、脉冲前沿(上升时间)、脉冲后沿(下降时间)、脉冲上冲、脉冲下冲、脉冲下垂、脉冲顶部不平度等,脉冲参数的计量主要就是对这些参数进行计量。本程序包实现基于FPGA实现脉冲宽度和重复周期的测量。(Who have access to the pulse envelope sample sequence, the pulse measurement to be the main characteristic parameters are: pulse amplitude (PA), pulse time of arrival (TOA) and pulse width (PW). The actual measurement, the pulse shape is a wide variety of shapes, but its main parameters of the pulse amplitude, pulse width, pulse period, pulse duty cycle, pulse leading edge (rise time), pulse along (down time), the red pulse, pulse undershoot, pulse droop, pulse irregularities, such as at the top, the measurement of pulse parameters is mainly the measurement of these parameters. The package FPGA-based pulse width and repetition to achieve the measurement cycle.)
- 2009-07-08 14:32:08下载
- 积分:1
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vivado2018+IPs
说明: Xilinx Vivado 2018 License File
- 2021-01-19 22:08:41下载
- 积分:1
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RAM
这是个双端口双端口ram的定义,当然读者在此基础上还可以扩充(This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded)
- 2009-05-24 11:41:19下载
- 积分:1
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CORDIC的资源
说明: NCO生成原理接介绍、CORDIC算法原理介绍以及MATLAB与Verilog语言实现(Introduction to NCO generation principle)
- 2020-01-03 13:57:22下载
- 积分:1
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verilog spwm
电子设计竞赛中获二等奖,在FPGA中实现的两路自然采样SPWM
- 2022-01-25 20:26:57下载
- 积分:1