PowerPC 体系结构开发者指南.doc

关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.-FPGA pipelined designs on paper This work invest

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C语言参考手册（原书第5版），pdg转pdf版，较为清晰。深入学习C语言的必读之物。-C Language Reference Manual (the original version 5), pdg transfer pdf version, more clear. Depth study of C language objects required reading.

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本书以DirectX SDK 9.0版为蓝本，内容几乎涵盖了在Windows平台上使用DirectShow进行C++编程的方方面面。全书共分4个部分。第1部分详细介绍了DirectShow的基础知识。第2部分重点讨论了Filter的开发，以及DirectShow应用程序的开发，包括目前非常流行的音视频采集、数码摄像机的支持、非线性编辑等应用。第3部分深入分析了DirectShow SDK提供的部分典型源代码。第4部分结合作者个人的一些开发实践，通过案例和开放源代码分析，进一步介绍DirectShow的实务应用。

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《TCP/IP详解，卷1：协议》是一本完整而详细的TCP/IP协议指南。描述了属于每一层的各个协议以及它们如何在不同操作系统中运行。-《TCP/IP Detailed, Volume 1: The agreement》is a complete and detailed TCP/IP protocol guidelines. Describe each level belonging to the various agreements and how they run on different operating systems.

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