Verilog HDL 程序设计实例

ad转换器ads822e/ads822的驱动模块(AD converter ads822e/ads822 driver module)

基本功能的cpu，自定义内存内容~了解CPU运作原理~(design of cpu,VHDL environment~)

vhdl code for carry lookahead addder

VHDL code of a counter Code VHDL d un compteur

ADDER USING VERILOG ADDER WITH VERILOG VERILOG ADDER

基于FPGA的PWM波生成程序，用于控制步进电机。(A PWM wave generater for driving stepper motor.)

加减可控制的十到十六进制计数器。完全准确，可以放心使用的(Add and subtract controllable ten to hexadecimal counter. Entirely accurate, can be at ease of use)

基于单片机显示原理的IO和LED显示原理(Based on the principle of IO chip and LED display shows the principle)

SPI_Master_verilog_code

verilog编写的16阶升余弦滤波器 采用直接型结构实现 对方波进行滤波 输出波形 含testbench文件(order raised cosine filter verilog written 16 direct-type structure to achieve the other wave filtering the output waveform containing testbench file)