UART_Verilog

Arbiter code for simulation purpose

给FPGA程序，使之产生信号，驱动AD7606读取数据，并行模式。(give FPGA signal to read AD7606)

基于FPGA的2FSK调制解调，里面有详细的工程说明，对于学习ISE软件和通信原理的知识很有帮助(FPGA based 2FSK modulation and demodulation, which contains detailed engineering instructions, for learning ISE software and communication principles of knowledge is very helpful.)

HDL verilog 电子密码锁 输入错误后有报警 输入正确后有提示(HDL Verilog electronic code lock input errors have prompted alarm input is correct)

基于altera公司的fpga的lcd12864显示字符汉字的模块，模块接口简单易于复用。(Altera fpga-based company s lcd12864 display kanji character module, the module interface is simple and easy to reuse.)

AMBA总线的Verilog语言模型 包括:AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。

说明：  VHDL语言的有限状态机法控制8位/12位自动转换通道模数转换器AD7938(VHDL, FSM method to control 8-bit/12-bit ADC AD7938 auto-conversion channel)

说明：  经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

Synthetic Aperture Radar (SAR) imaging simulation target, Using wavelet denoising thought, LCMV optimization design array signal processing.

这是一个可综合的除法器，内部包含除法模块，比较模块，除法模块。