verilog实现有限域GF(28)弱对偶基乘法器

eDP接口TFT-LCD显示驱动原码（verilog+c）(eDP Interface TFT-LCD display driver source code (verilog+c))

本文档内容是各大公司的薪资，各位可以了解一下，绝对真实，具体到个位数。

用Verilog实现的 哈佛结构的简单指令集CPU程序，由ALU、地址译码器、指令译码器等部分组成(Part of a simple instruction Verilog realize the Harvard architecture CPU program set by the ALU, address decoder, an instruction decoder, etc.)

用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。(It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.)

讲述了dds直接数字频率合成的基本原理，同时用ＶＨＤＬ语言编写dds原代码用于生成正弦波，并在ISE开发平台进行仿真和MATLAB验证正弦波输出结果(described dds direct digital frequency synthesis of the basic tenets addition to the use of VHDL prepared dds source used to produce sine, and ISE development platform for simulation and verification MATLAB sine wave output)

华为FPGA设计全套资料，学习FPGA的朋友可以下载看看。(Huawei FPGA design a full set of materials, friends learning FPGA can download and see.)

说明：  SDRAM硬件控制,fpga的verilog语言，适合学习(SDRAM hardware control, Verilog language of FPGA, suitable for learning)

这个文档回答了很多关于AHB总线在使用上经常遇到的问题(this doc gives a lot of answers for using AHB bus when doing design)

THIS IS A SOURCE CODE FOR LIFT IN VHDL LANGUAGE

fpga verilog实现 S29GL256S 系列 并行 nor flash 的读写擦除操作功能。 verilog源代码。(Verilog S29GL256S to achieve FPGA series parallel flash nor read and write erase operation function. Verilog source code)