verilog实现有限域GF(28)弱对偶基乘法器

说明：  基于fpga状态机的交通灯设计，亮灯时间自己修改，程序简单易懂。(Traffic light design based on FPGA state machine, light time self-modifying, the program is simple and easy to understand.)

LVDS并行数据传输，来自XILINX官网(LVDS Parallel Data Transfer)

微分器：利用数字锁相环进行位同步信号提取的关键模块(Differentiator: the use of digital phase-locked loop for bit synchronous signal extraction of key modules)

用FPGA实现SPWM波输出，其中包含三角波和正弦波(With the FPGA realization of SPWM wave output, including triangle wave and sine wave )

异步fifo设计代码，包含完整过程，需要的朋友可以参考，实际设计代码，参考了多个版本，通过了项目验证，已经实际应用。

说明：  利用verilog写的PWM 程序，来实现产生呼吸灯的效果。(Using xerilog to generate breathing lamp)

使用QuartusII软件，利用VHDL语言设计实现CPU,其中包含时序图仿真。(Using software QuartusII, using VHDL language to design the CPU, which contains sequence diagram simulation.)

工程实用观点，简单介绍集成电路的传统设计语言现状。(Practical engineering point of view, the traditional integrated circuit design brief language status.)

PCIe demo sample code

说明：  寄存器设计文件，寄存器输入输出以及读写控制，寄存器的配置(Register design and read-write control)