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PC9054_1124
基于FPGA的PCI9054 LOCALBUS总线接口(PCI9054 interface program based on FPGA)
- 2015-04-07 09:44:02下载
- 积分:1
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submodule
verilog 双模块算术平均值计算模块,子模块在时钟上升沿技术,高层模块根据当前计数值计算算数平均(verilog double module arithmetic mean calculation module, sub-module in the clock rising edge technology, high-level module is calculated based on arithmetic average of the current count)
- 2011-01-05 22:49:16下载
- 积分:1
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verilog uart 115200
使用verilog编写的串口uart发送模块,发送速率为115200,输入时钟为50m,多年验证无任何错误
- 2022-02-09 17:35:29下载
- 积分:1
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FPGAshiyan(4)
FPGA入门系列实验教程——实验四.LED跑马灯(Getting Started with FPGA tutorial series of experiments- Experiment IV. LED Marquee)
- 2010-11-05 17:44:05下载
- 积分:1
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8aqm-string-and-convert-vhdl-program
8aqm调制串并转(1:3)换部分vhdl程序(8aqm string and convert vhdl program)
- 2011-01-20 18:31:26下载
- 积分:1
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AD9469 FPGA 代码 软件无线电前端
AD9469 FPGA 代码 软件无线电前端
AD9469 Verilog 代码
FIFO后数据处理等
- 2022-04-19 09:18:49下载
- 积分:1
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CPLD_PWM
一个在CPLD,EPM70128上实现的PWM控制源程序。(A CPLD, EPM70128 realize the PWM control on the source.)
- 2008-07-25 12:43:39下载
- 积分:1
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CY7C68013A_board_test
该资料基于FPGA实现USB2.0的高速传输,即CY7C68013A芯片的数据传输,包括FPGA与上位机之间数据的相互传输,CY7C68013A的传输速率最高可达480M/S。(The FPGA-based high-speed data transmission USB2.0, that CY7C68013A chip data transmission, including the mutual transmission of data between the FPGA and the host machine CY7C68013A transfer rate up to 480M/S.)
- 2020-08-24 21:48:15下载
- 积分:1
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ClockSync
基于COMTEX-M3的IEEE1588,irigB对时的源程序,包括GPS对时程序,并将对时的结果写入FPGA中(Based COMTEX-M3 of IEEE1588, irigB on time source, including GPS for the program, and writes the results when the FPGA)
- 2015-05-12 15:11:03下载
- 积分:1
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alu
verilog code for 8 bit alu
- 2015-06-30 18:49:10下载
- 积分:1