8位吠陀乘数

说明：  基于FPGA设计的一段测试VGA接口的VHDL小程序\功能为在显示器上间隔显示横条、竖条以及棋盘格等彩条信号，希望对初学FPGA驱动VGA接口的电子爱好者有用(FPGA-based design of a VGA interface VHDL test applet \ functions for the intervals shown in the display bar, vertical bars and checkerboard patterns and other signals of color, hope for beginners FPGA VGA interface driver useful for electronic enthusiasts)

介绍USB PHY接口中的UTMI接口， 对使用Verilog进行USB接口编程具有帮助。(This paper introduces UTMI interface in USB PHY interface. It is helpful for programming USB interface with Verilog.)

说明：  处理器系统，处理器加上存储器，从存储器取出指令放入处理器执行(processor system, instructions stored in ROM, a counter generate address and the processor execute instructions.)

串口收发，实现可调波特率的串口通信，verilog源码(Serial port and transceiver)

说明：  AXI4-Lite总线的主从机读写，例程及代码(AXI4-Lite Bus Host-Slave Read-Write, Routine and Code)

完整的verilog编写的源代码，根据实际所用的器件，修改相关参数，就可实现VGA的驱动。

GPU编程的经典之作,值得一读。 GPU运算效率比CPU高出一截，学习GPU编程会大有裨益(a book for GPU_Programming)

8位并行输入的数转换成串行输出，是基于高级硬件编程语言VHDL编写的。(8-bit parallel input into serial output digital conversion is based on the high-level hardware programming language VHDL prepared.)

说明：  基于FPGA的CAN总线控制器，VERILOGHDL源代码，Q2仿真实现。可用。(FPGA-based CAN Bus Controller, VERILOGHDL source code, Q2 Simulation. Available.)

Avt_S6LX9_MicroBoard_UCF_110127，有关xilinx spartan6开发板的相关参考设计。(Adding Custom IP to an Embedded System, the relevant reference on xilinx design.)