基于ISE的verilog代码以控制led

一个简单的UART串口程序，能实现数据的发送与接收，但没有奇偶校验等验证数据传输是否正确。(A simple UART serial program, can send and receive data, but there is no parity and other validation data is correct.)

FPGA控制步进电机的程序，带有加减速，方向控制，速度可调。并且有SPI接口，由状态机控制电机的加减速，电机运行步数可控。

基于Verilog HDL的SDRAM控制器。 实验条件： 工具：Quartus II 6.0 ,SignalTap II FPGA：Altera Cyclone EP1C12Q240C8N SDRAM：HY57V283220T-6(SDRAM controller based on Verilog HDL. Experimental conditions: Tools: Quartus II 6.0, SignalTap II FPGA: Altera Cyclone EP1C12Q240C8N SDRAM: HY57V283220T-6)

以Cyclon II 系列芯片EP2C35F672C6N 为核心的开发板，用verilog语言描述高速公路上汽车行驶的状态，检测t时刻高速公路上汽车行驶的是否在当前规定的车道内。

八位并行数据转换为串行数据依时钟信号串行输出(Eight bit parallel data to serial data)

说明：  基于FPGA的信号发生器，产生了正弦波，方波，锯齿波和三角波四种波形，按下一次按钮，波形切换一次。按下另一个按钮，改变波形的频率(The signal generator based on FPGA can generate four kinds of waveforms: sine wave, square wave, sawtooth wave and triangle wave. Press the button once and switch the waveform once. Press another button to change the frequency of the waveform)

本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式；并对这两种实现方式的优点和缺点进行分析，比较后确定本系统的方案：基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)

基于CPLD的交通灯控制，完成交通灯的功能，校错能力(CPLD-based control of traffic lights, traffic lights to complete the function, the school was wrong capacity)

用verilog  语言写的一个fir低通滤波器的程序，原始数据通过matlab来输入，输出给matlab来显示结果

自己写的7人表决器的verilog程序，实现4人以上通过则通过的功能。(Seven people to write their own voting machine verilog program to achieve four or more people pass through function.)