30 vhdl source for the beginning of the study vhdl helpful, and can help to unde...

crc-16的编码，使用的多项式是G(x)=x^16+x^12+x^5+1(generator polynomial of degree 16: G(X)=x^16+x^12+x^5+1)

红外接收处理，根据外部波形记录波形的高低电平时间，从而得到波形数据。(Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.)

基于QuartusII环境下以模块化的形式做成的视频复合同步信号。-QuartusII-based environment to create the form of modular composite video sync signal.

fpga串口的接收程序基于verilog语言拿走不用谢。(The receiving program of FPGA serial port is based on Verilog language.)

数字自动增益控制 AGC （automatic gain control） Verilog(automatic gain control Verilog)

E1成帧器和解帧器的FPGA实现源码，测试可用(E1 Framer deframer)

n_bit_paralleLoadShiftRegJK

本程序用以驱动安捷伦频谱仪和脉冲信号发生器，以产生格雷码波形。(It is aim to driver the PSG and ESA to generate Golay.)

系统介绍EDA技术的发展概述，相关概念，VHDL语言、MAX+PULS、QUARTUS的设计方法。-System overview of the development of EDA technology, related concepts, VHDL language, MAX+ PULS, QUARTUS design method.

这个我也太清楚是什么 反正师兄们说有用 发大家-I am also very clear that what is useful anyway, say senior U.S. fa