16QAM调制与解调的FPGA实现

本课题描述了基于fpga的32点fft的设计。这里进行verilog编码来实现这个32点fft。使用xilinx ise 12.1版本进行合成和模拟；

利用verilog语言实现了SHA-1机密算法，具体算法与加密芯片ds28e01一致。(Using Verilog to achieve the SHA-1 secret algorithm, the specific algorithm is consistent with the encryption chip ds28e01.)

在quartus下搭建的数字锁相环，能实现频率自动跟踪。(The digital phase-locked loop built under quartus can realize automatic frequency tracking.)

用FPGA verilog hdl模拟类I2C通信

基于VHDL语言编写，可下载到FPGA板子上实现的cordic算法实现的设计，并用该算法实现sin和cos的计算，计算结果显示在数码显示管上，已包含按键防抖动功能的实现。(Based on VHDL language, can be downloaded to the the cordic algorithm implemented in the FPGA board to achieve the design and calculation of sin and cos using this algorithm, the results displayed on the digital display tube is included on the function of the realization of the button shake.)

自己用verilog编写的crc16-ccitt码的产生，是并行的。(Crc16-ccitt code written in verilog generate parallel.)

synopse sv培训lab，是学习systemverilog非常好的资料，放心下载。(synopsis sv training lab)

宽带波束形成，设计FIR滤波器系数。带宽为500Hz--700Hz,采样率为3000Hz，对白噪声序列进行滤波，即得到有限带宽的宽带时域信号(Broadband beamforming design FIR filter coefficients. Bandwidth of 500Hz- 700Hz, sampling rate of 3000Hz, filtered white noise sequence, ie limited bandwidth broadband time domain signal)

说明：  本文档具有较全面的dw_apb_uartd的接口代码，具有详细的注释，很方便供用户学习。(This document has a more comprehensive dw_apb_uartd interface code, with detailed comments, which is very convenient for users to learn.)

fpga DCM使用教程 好几个文档 帮助您一次学会使用DCM(fpga the DCM using the tutorial a few documents to help you first learn to use the DCM)