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DE2_115_CAMERA
d5m的DE2驱动Verilog HDL (d5m driven on DE2 by Verilog HDL )
- 2020-07-09 20:38:55下载
- 积分:1
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(15-7-2)BCH
Verilog HDL 语言编写的(15,7,2)BCH编码和译码功能(Verilog HDL language (15,7,2) BCH encoding and decoding functions)
- 2020-10-29 11:19:57下载
- 积分:1
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以太网控制器Verilog源码(含有MAC,MII接口)
以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))
- 2017-08-18 10:32:27下载
- 积分:1
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8位大小比较器
说明: 8位大小比较器的VHDL源代码,Magnitude Comparator
VHDL description of a 4-bit magnitude comparator with expansion inputs(eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion)
- 2005-10-28 22:35:12下载
- 积分:1
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random_num_gen
通过随机数产生原理进行verilog编程,从而实现FPGA的随机数产生(Through random number generation principle for Verilog programming, so as to achieve the FPGA random number generation)
- 2017-07-08 11:55:41下载
- 积分:1
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Verilog数字系统设计教程(第二版) 夏宇闻
Verilog数字系统设计教程(第二版) 夏宇闻(Verilog Digital System Design Course (2nd Edition) Xia Yuwen)
- 2020-06-20 18:40:02下载
- 积分:1
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电梯控制器
一个9层电梯的代码。每层电梯入口处,要求开关1,电梯内设有乘客到达的停止开关的水平。(没有下降的按钮,一楼九楼没有上行键)
- 2023-08-07 07:00:03下载
- 积分:1
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VHDL
用VHDL语言实现一Mealy型时序电路,并做时序仿真和功能仿真检验正确与否。(Implement a Mealy-type sequential circuits using VHDL language, and do functional simulation and timing simulation test correct.)
- 2014-03-20 14:44:28下载
- 积分:1
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GPS
在fpga中对GPS信息采集程序。具有很好的参考性(In the fpga in the GPS information collection procedures. Has a very good reference)
- 2011-11-17 13:49:20下载
- 积分:1
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AD7760_TEST
AD7760模数转换,使能滤波器功能,简单易懂,可进行各种配置 全功能支持,并附加使用说明(AD7760 Full Function Support with Additional Instructions)
- 2021-03-17 13:39:20下载
- 积分:1