数字频率计VHDL程序

EDA中常用模块VHDL程序，不同时基的计数器由同一个外部是中输入时必备的分频函数。分频器FENPIN1/2/3(50分频=1HZ，25分频=2HZ，10分频=5HZ。稍微改变程序即可实现)-EDA VHDL modules commonly used procedure, the time- with a counter by the external input is required when the sub-frequency functions. Frequency Divider FENPIN1/2/3 (50 1HZ frequency = 25 = 2HZ-frequency, frequency = 10 points Stripper. A slight change in procedure can be realized)

verilog program for real time clock.. select the .v file to view the code.

基于FPGA的1602时钟显示,驱动1602显示时钟,矩阵键盘调时(1602 FPGA-based clock display, clock display driver 1602, when the transfer matrix keyboard)

16位CUPIP核,完全运行的好的东西,可以直接拿来用的!-16 CUPIP nuclear, full of good things to run, can be directly used to use!

由于在网上很难下载到EDA技术－窦衡的PPT，所以本人经过学习后做成word，供大家下载。只针对VHDL语言部分和所有的程序。-Because the Internet is difficult to download to EDA technology- Douheng of the PPT, so I made after learning after the word, for all to download. Only for part of the VHDL language and all the procedures.

基于VHDL实现加扰器解扰器的设计，与仿真。(VHDL-based scrambler descrambler design and simulation.)

说明：  通过spi实现加速度计adxl357读取xyz三轴方向的加速度值(Accelerometers adxl357 read the acceleration value of XYZ three-axis direction through SPI)

一种能简单的实现I2C通讯的代码，对于主机和从机之间的通讯讲解的很清楚。(A Code for I2C Communication)

说明：  C8051F的一个特点就是可以倍频到100M。近来用到。在单片机的调试通过其PLL倍频函数。供用到的朋友参考和借鉴。(One feature is the ability C8051F multiplier to 100M. Recently used. In MCU debugging functions through its PLL multiplier. Used for reference for a friend.)

zc706板子原理图，在使用板子时候可以参照设计，使用帮助巨大。(Zc706 board schematic diagram, when using the board can be reference to design, use the help.)