国密SM4 verilog实现

说明：  quartus II中文用户教程(英文版的完全翻译）,和一切爱好可编程器件的同仁共勉之(Quartus II Chinese user guide (English version of the full translation) love and all programmable devices colleagues share Zhi)

Altera SOPC 开发套件，它用 verilog 语言开发。它是有用的 EDA 设计倾向。有三个完整的示例的 SDRAM，led 灯和内皮祖细胞。有逻辑的设计举例。

FPGA与PC端实现串口数据的收发，先从PC端接收数据，然后发回给电脑，可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)

蛋蛋助手,可以动态配置生成代码格式,方便ORM或或程序员的生成工作 ，经测试 (Egg assistant, can be dynamically configured to generate code format, convenient ORM, or programmer generation work, tested)

基于fpga的spi  master  testbench，             适合初学者

用verilog hdl编写的一些例程，包括加法器/减法器等等，例子较多就不一一列举了(Verilog hdl prepared with some routines, including the adder/subtraction, etc., for example, more is not to enumerate the)

电梯控制，包括楼层按键相应，显示上下状态。(Elevator control, including the floors of the corresponding button to show the whole state.)

说明：  使用FPGA测量频率大小，并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)

DE2 altera board vhdl design

在Quartus环境下编写，使用Cyclong系列芯片，配置七通道高精度AD5791，该例子为AD5791的FPGA配置使能代码,包括模拟数据输入模块，复位模块，命令接收是能配置模块。(AD5781，Digital signal convert to Analog signal)