BCH编码器和解码器的源代码，FLASH控制器，通信是必要的哦

用verilog HDL语言编写的fifo存储器源文件 (Using Verilog language HDL FIFO memory source file)

dsp与fpga通信的verilog程序，强烈推荐欢迎参考(dsp and fpga verilog communication program, it is strongly recommended to welcome reference)

PS2的源代码VHDL语言实现，可以和计算机直接连接．做鼠标键盘接口．-PS2 source VHDL, and can be connected directly to the computer. So the mouse, keyboard interface.

HARQ技术研究，以喷泉码为研究对象，结合LDPC纠错码而研究的。(HARQ technology research to fountain codes for the study, and research combined with LDPC error correction code.)

example of BCH and RS codecs

设计一个8位有符号数字平方器。平方器将接收操作数B，一个8位有符号数。新兴市场；

基于VHDL语言的并串转换程序，有四位的并行输出转换为串行输出-Based on the VHDL language and string conversion process, there are four parallel output is converted to serial output

说明：  假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 +　寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)

8位相 加乘法器，具有高速，占用资源较少的优点-eight multiplier phase together with high-speed, taking up less resources advantages

vivado lwip 应用文档 基于zynq 7020(vivado lwip example text of zynq)