同步 FIFO 设计 Verilog 代码

采用xilinx的ROMIP核产生类似正弦信号，经过FFt后可以观察结果(Using the xilinx ROMIP nuclear generating similar sinusoidal signal can be observed through the results after FFt)

采用verilog语言基于查找表描述8b10b编码源代码(Using Verilog language to describe 8B10B encoding source code based on look-up table)

Lift Controller in vhdl using process statement and state disgram

能实现输入0.5 1 5块钱的累加，然后对应购买的商品价格进行比较，显示找的钱数或错误灯(MY English is very good)

这是基于MIMO-OFDM的同步算法研究的源程序。本程序采用的极大似然估计的方法。(This is based on MIMO-OFDM synchronization algorithm source code. The program uses the method of maximum likelihood estimates. )

CAN总线开发代码，FPGA与sja1000通信，可实现CAN的接收和发送。(The FPGA and the sja1000 CAN bus development code, communication, which CAN realize the CAN send and receive.)

bios spi flash acer 5740g

远立科技FPGA培训文档,关于GFP项目的一些细节，很好的！(Yuan established FPGA technology training documentation)

介绍了基于VHDL的可编程分频器在波形发生器中的应用的方法，利用这一方法， 可使波形频率在大范围内变化。()

When the initial input falls between the Switch off point and Switch on point values, the initial output is the value when the relay is off.