UART module Verilog codes and guidance

光标移动程序适合新人学习，对于新人提升自身能力比较好，让新人快点掌握写程序的基本思想.

说明：  本实验为UART回环实例，实验程序分为顶层unrt_top、发送模块uart_tx、接收模块 uart_rx，以及时钟产生模块clk＿div。uart＿rx将收到的包解析出8位的数据，再传送给 uart_tx发出，形成回环。参考时钟频率为100MHz，波特率设定为9600bps。(This experiment is an example of UART loop. The experimental program is divided into top-level unrt_top, sending module uart_tx, receiving module uart_rx, and clock generation module clk_div. Uart_rx parses the received packet into 8 bits of data and sends it to uart_tx to send out, forming a loop. The reference clock frequency is 100 MHz and the baud rate is set to 9600 bps. stay)

说明：  实现fpga 读写flash 在k7上验证(Realization of FPGA read-write flash verification on K7)

完成cmos摄像头对图像的捕捉，然后进行拼接通过USB进行传输。(complete picture capture)

它是利用FPGA实现OFDM系统的整体设计，包括两部分，一部分是发射机，另一部分是接收机。

文件用于驱动TFT屏，分辨率800*400，平台为quartus13，芯片为cycloneIV(The file is used to drive the TFT screen with a resolution of 800*400. The platform is quartus 13 and the chip is cyclone IV.)

说明：  ad 9226 数据采集芯片的 FPGA 实现，FPGA 对数据的采集准确，通过仿真和实测(The FPGA implementation of ad9226 data acquisition chip,FPGA data acquisition accuracy, through simulation and measurement.)

字长可以简单调整，即可实现任意字长UART通讯(The word length can be simply adjusted to achieve any word length UART communication.)

使用Verilog实现的AD采样，很有用的！(Implemented using Verilog AD sampling, very useful!)

these are the source codes for the book " 100 power tips for FPGA designers"