Booth乘法器

walsh码，在CDMA系统中经常使用到的方法，在quartusII环境下实现的。(walsh code in the CDMA system, the method often used in quartusII environment to achieve.)

使用verilog实现模六十计数即0-1-2-3-4-5-.......-59-0-1-2的功能。(Use Verilog to realize the function of the mode sixty count, 0-1-2-3-4-5-....-59-0-1-2.)

MAX262是一款可程控滤波芯片,该是它的英文数据手册.(MAX262 is a programmable filter chip, which is its data sheet in English.)

PCI slave IP core, in VHDL language ,has been verified,it is very easy to use. it is an ideal IP to study PCI,design PCI Bridge

基于DDS和SOPC的谐波信号发射器，拥有可调节的频率，阶段和谐波比例的谐波信号发射器由本文所设计。(Based on DDS and SOPC harmonic signal transmitter, with adjustable frequency, phase and harmonic proportion of harmonic signal transmitter designed by this article.)

此为实现第14.7.9章所需的激励文件 该代码为门级RTL描述。(Stimulus file to verify Section 14.7.9 the functionality of gate vs. RTL description.)

it is hybrid squarer circuit which will be designed using reversible gates which having les hardware complexity with compared to the conventional gates

之前看到很多人用fpga写边缘检测，都是调用了fpga的ip，这里我把这写ip都用verilog写出来，用asic实现sober边缘检测。

AD706在Sparten6使用的FPGA代码，测试通过(AD706 FPGA Code In Sparten6)

FPGA-based high-speed image acquisition system