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DDR2控制器,verilog源码

于 2022-05-16 发布 文件大小:1.16 MB
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利用verilog编写的ddr2控制器,实现了ddr2的读写功能,在xilinx vietex5上得以实现,实现了成像算法中的数据转置,啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊啊

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