upp 接口，verilog

Basic VHDL code to create a sine wave generator for an FPGA board.

一款非常实用的8051IPcore,本人现在做soc的控制部分就是它。(A very useful 8051IPcore, I now control part of the soc is doing it.)

说明：  电路四倍频算法，具有去毛刺，整形功能，方向及计数(Circuit quadruple frequency algorithm, with deburring, shaping function)

TCM编码的调制端，采用8PSK，2/3码率的卷积码的matlab程序(TCM coded modulation client, using 8PSK, 2/3 code rate of convolutional codes of matlab program)

这个程序是用来划分时钟，实现9600个传输速率的。该代码是在10兆赫的时钟频率运行。它计算特定的传输速率所需的比特数；

使用Verilog编写的ad9826的控制模块(the module of ad9826 with verilog)

VIP FPGA板的配套例子，这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)

Multiplication in Verilog code

K2FPGA开发板实验教程——I2C协议说明及verilog实现读写I2C器件，中文内涵代码，验证可用。(K2FPGA development board test tutorial- I2C protocol description and verilog read and write I2C devices, Chinese connotation code to verify availability.)

说明：  DFT FPGA实现,simulink到vivado(DFT FPAG implement base on simulink and HLS)