基于Verilog的IIC协议的实现

systemc实现的一个fifo，对想要学习systemc的同学很有帮助哦(A fifo systemc achieved, the students want to learn systemc helpful oh)

二进制转十进制BCD码 Verilog语言 quartusII(Binary to decimal BCD code Verilog language quartusII)

实现基于matlab的QMFB的完全重建，是一篇经过仿真且经过测试的正确的代码，可用价值比较高。(Based on matlab QMFB the completely rebuilt, is a through simulation and tested the correct code, can be relatively high value.)

说明：  Xilinx 公司Spartan-6系列FPGA实现LVDS，带Modelsim仿真文件，已综合。(Xilinx Spartan-6 Series FPGA implements LVDS with Modelsim simulation file, which has been synthesized.)

使用FPGA实现UART收发。支持多种波特率。(Using FPGA to achieve UART transceiver.)

很有用的ＳＤＲＡＭ读写代码，上板验证有效

中频70M，30M带宽LFM信号，采样率为102.4M，，数字下变频后，还进行了三倍抽取，最后还得到I，Q两路信号 (IF 70M, 30M bandwidth LFM signal, the sampling rate 102.4M, under digital variable frequency after also carried out three times extracted, and finally also received the I and Q signals)

verilogPWM波的设计，属于数字电子技术实验入门的资料

Verilog实现的udp协议，比网络上的资源更加丰富，想要了解altera tse相关源码，就大胆下载吧，给你想要的一切。

arm的axi接口转spi接口master源代码，已经使用过，带注释，