基于FPGA驱动高速AD/DA

8 位规模 comparater 与注册

说明：  fpga程序，产生1pps脉冲信号，使用的verilog语言。(FPGA program generates 1 PPS pulse signal, using Verilog language.)

HDL verilog 电子密码锁 输入错误后有报警 输入正确后有提示(HDL Verilog electronic code lock input errors have prompted alarm input is correct)

这段代码在 verilog 的用于计算 2 的浮点数，需要计算的保险带的 all32 位，它可以用。

基于软输出固定复杂度球形译码的高效迭代检测算法，最新的球形译码论文(Iterative detection algorithm based on a fixed complexity soft-output sphere decoding efficiency, sphere decoding papers)

Crossroad traffic lights with visualization in tcl/tk and verilog code

verilog代码，串口发送接收代码，含有源代码和测试文件，准确可用(verilog code for serial port transmit and receive code, with source code and test files, and accurate available)

基於空間向量調變的開關法，在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)

数字电路与逻辑设计实验编程，包含多功能电子钟程序，实用，简易(Digital circuits and logic design experiments programming, including multi-function electronic clock procedures, practical, simple)

使用verilog语言描述的二阶巴特沃斯IIR滤波器，程序中有参数说明，已经运行通过(Using verilog language to describe the second-order Butterworth IIR filter, the program has parameter description has been run through)