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凌阳61 串口和usb
isp在线调试程序
凌阳61 串口和usb
isp在线调试程序-Sunplus 61 serial and usb isp-line debugger
- 2022-01-31 12:04:28下载
- 积分:1
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some examples of EZUSB s interrupt routine
some examples of EZUSB s interrupt routine
- 2022-07-20 10:03:39下载
- 积分:1
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usbc测试软件,在各种操作系统都可以,比较好用,请适用
usbc测试软件,在各种操作系统都可以,比较好用,请适用
-usbc testing software, the various operating systems can be more convenient, please apply
- 2022-01-22 16:18:59下载
- 积分:1
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LIBUSB USB host
LIBUSB USB的主机端驱动,很方便-LIBUSB USB host-side driver, it is convenient
- 2022-01-25 15:39:35下载
- 积分:1
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USB2.0的通信协议,详解,好东西,来自网络,非原创
USB2.0的通信协议,详解,好东西,来自网络,非原创
-USB2.0 communication protocol, detailed, good things, from the network, non-original
- 2022-07-23 08:04:57下载
- 积分:1
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关于USB便携多道系统,PC端客户软件。调用硬件前,须安装好设备驱动程序,使Windows找到USB便携多道设备,否则可以使用其中的软件模拟功能。...
关于USB便携多道系统,PC端客户软件。调用硬件前,须安装好设备驱动程序,使Windows找到USB便携多道设备,否则可以使用其中的软件模拟功能。-on USB portable multi-channel system, the client PC software. Call hardware, it should install a device driver, Windows find USB portable multi-channel equipment, which can use the software simulation function.
- 2022-02-15 00:59:55下载
- 积分:1
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Usb1.1驱动c语言源代码
Usb1.1驱动c语言源代码-USB 1.1 Driver Source code (C Language)
- 2023-01-24 06:25:04下载
- 积分:1
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PHILIPS 的D12 开发PC机侧的说明和例子
PHILIPS 的D12 开发PC机侧的说明和例子-PHILIPS development of the D12 PC side of the description and examples
- 2022-03-28 20:39:56下载
- 积分:1
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For USB 2.0 standards and lower PC communication standards, the various parts of...
对USB的2.0标准和上位机下位机通讯标准,各部分的结构组成和实现情况进行整理。当时做项目涉及到这部分的知识,所以看了大量的资料,这部分的东西蛮多-For USB 2.0 standards and lower PC communication standards, the various parts of the structure of the composition and finishing realize the situation. At that time, to do projects related to this part of the knowledge, so read a lot of information, this part of the East and West蛮多
- 2022-11-19 02:55:03下载
- 积分:1
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高容量的USB 2设备将采用ASIC技术与嵌入式设计…
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.
For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled
in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB
signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0
signaling running at hundreds of MHz, the existing design methodology must change.
- 2023-07-03 16:35:03下载
- 积分:1