ADC CS5368驱动

SDR SDRAM 控制器的源代码 altera公司的(source code from altera)

emWin 在LPC2478上实现LCD的高性能显示(emWin to achieve high-performance LCD display in the LPC2478)

资源描述该代码通过例化ram，然后再利用读写指针的比较来判断full和empty的状态，从而实现了同步FIFO的设计

说明：  使用STM32官方提供的DSP库进行FFT，虽然在使用上有些不灵活（因为它是基4的FFT，所以FFT的点数必须是4^n），但其执行效率确实非常高效，看图1所示的FFT运算效率测试数据便可见一斑。该数据来自STM32 DSP库使用文档(. Using the official DSP library provided by STM32 for FFT is not flexible in use (because it is the FFT of base 4, so the number of FFT points must be 4 ^ n), but its execution efficiency is really very efficient, as can be seen from the test data of FFT operation efficiency shown in Figure 1. This data comes from STM32 DSP library usage document)

PS2键盘控制器的VHDL源码，用FPGA直接读取键盘的输入并显示。(PS2 keyboard controller VHDL source code, with a direct FPGA to read keyboard input and displayed.)

八位串行乘法器 缺点：乘法功能是正确的，但计算一次乘法需要8个周期，因此可以看出串行乘法器速度比较慢、时延大。 优点：该乘法器所占用的资源是所有类型乘法器中最少的，在低速的信号处理中有广泛的使用。(Eight bit serial multiplierDisadvantages: the multiplication function is correct, but the computation of one multiplication requires 8 cycles, so it can be seen that the serial multiplier is slow and time-consuming. Advantages: the multiplier occupies the smallest number of resources in all types of multipliers, and is widely used in low speed signal processing.)

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ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

说明：  简单流水线CPU，使用 verilog实现，实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)

The PID controller IP core performs digital proportional–integral–derivative controller (PID controller) algorithm. The algorithm first calculates the error between a measured value (PV) and its ideal value (SP), then use the error as an argument to calculate the manipulate value(MV). The MV will adjust the process to minimize the error. It can be used to calculate duty cycle for PWM (Pulse Width Modulation).