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fft_fpga_dit
Decimation-In-Time Fast Fourier Transform
I"ve tried to make the implementation simple and well documented.
I have not tried to make it efficient.
dit.v - Contains main module.
buffer.v - Contains a module for a single butterfly step.
generate_twiddlefactors.py - Contains function to generate a verilog file with twiddlefactors.
twiddlefactors_N.v.t - Template used to generate verilog file.
dut_dit.v - A wrapper around the "dit" module to allow verification with MyHDL.
qa_dit.py - A MyHDL test bench for verification.
Requires MyHDL, iverilog and numpy to be installed.
pyfft.py - Generates output of intermediate FFT stages. Useful for debugging.
- 2022-03-30 05:04:52下载
- 积分:1
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编码器-使用if else 语句
编码器
编码器是设备、 电路、 传感器、 软件程序、 算法或人 thatconverts 信息从一个格式或代码到另一个,为标准化、 速度、 保密、 安全、 或通过收缩大小节省空间的目的。
简单的编码器
一种简单的编码器电路可以接收单个活动输入 2
n
输入的行上生成二进制代码
n
并行输出线。
请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报 打分 发表评论 暂无评论
- 2023-06-02 12:00:04下载
- 积分:1
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fpga(CAN)
fpga实现CAN总线控制器源码,每个项目都有说明文件,介绍使用方法。(fpga CAN Bus Controller source, each with explanatory documents on the use of methods.)
- 2020-11-26 15:09:31下载
- 积分:1
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ModelSim-gaojishiyong--Camp
FPGA开发仿真工具modelsim的高级进阶教程,包括如何写脚本文件和后台批处理文件(FPGA Development Advanced simulation tools modelsim tutorial, including how to write a script file and back-office batch file)
- 2012-05-09 23:52:21下载
- 积分:1
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dma_hussam
verilog code for dma
- 2021-04-24 19:09:04下载
- 积分:1
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verlog通过FPGA实现数字钟
verlog通过FPGA实现数字钟,包含时间计数,秒表和闹钟等功能
- 2022-03-14 07:30:03下载
- 积分:1
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source
altera DDR3 逻辑测试代码,这是工程实际调试好的代码,保证能用。(altera DDR3 vhdl code)
- 2020-12-21 20:49:08下载
- 积分:1
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multi8x8
节约资源型 8位*8位 运算VHDL代码,采用串行运算,8 个时钟周期完成一次运算。QUARTUS下已验证(resource conservation-8* 8 Operational VHDL code, using serial computation. 8 clock cycles to complete an operation. QUARTUS has been under test)
- 2006-12-07 13:22:48下载
- 积分:1
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STM32F407FFT
说明: 使用STM32官方提供的DSP库进行FFT,虽然在使用上有些不灵活(因为它是基4的FFT,所以FFT的点数必须是4^n),但其执行效率确实非常高效,看图1所示的FFT运算效率测试数据便可见一斑。该数据来自STM32 DSP库使用文档(. Using the official DSP library provided by STM32 for FFT is not flexible in use (because it is the FFT of base 4, so the number of FFT points must be 4 ^ n), but its execution efficiency is really very efficient, as can be seen from the test data of FFT operation efficiency shown in Figure 1. This data comes from STM32 DSP library usage document)
- 2020-06-20 19:00:02下载
- 积分:1
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test1
利用matlab,对偏振控制器进行仿真,最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)
- 2013-04-07 10:42:15下载
- 积分:1