basicmmu sam9261的示例代码用（163 KB）这个项目的目标是核心。

在JXARM9-2410教学实验箱进行CF卡读写的实验-JXARM9-2410 in the experimental teaching me to read and write to CF card Experimental

资源描述单片机（51）系统开发中常常使用到温度传感器，而通常情况下我们会在仿真平台（proteus）上去首先测试，当系统完好时再实际使用。

嵌入式InterBase-Embedded InterBase

数码管显示 动态扫面c语言编写51单片机-LED display dynamic scanning surface c language 51 MCU

此程序在IAR Embedded Workbench 中，不能编译，请教大家指点。-At this procedure in the IAR Embedded Workbench can not compile, pointing to ask everyone.

AT24CXX 芯片驱动程序-AT24CXX chip Driver

深圳英蓓特EV40开发板的随机源码(Shenzhen Embest EV40 Development Board of random source)-Shenzhen Embest EV40 Development Board of random source

这 BSP 支持飞思卡尔 i.MX6Q 具有 QNX Momentics 6.5.0 Sabre 建兴平台。服务包 1 (SP1)。该软件包包含以下支持： IPL，串行驱动程序 I2C MMC/SD、 所有 USB 端口 （OTG 和 Host1 控制器）、 音频、 看门狗、 罐头、 RTC、 SPI NOR 闪存、 SMP、 以太网、 SATA、 图形、 等等 dirvers。

应用背景Abstract—Leros is a tiny microcontroller that is optimized for current low-cost FPGAs. Leros is designed with a balanced logic to on-chip memory relation. The design goal is a microcontroller that can be clocked in about half of the speed a pipelined on-chip memory and consuming less than 300 logic cells. The architecture, which follows from the design goals, is a pipelined 16-bit accumulator processor. An implementation of Leros needs at least one on-chip memory block and a few hundred logic cells. The application areas of Leros are twofold: First, it can be used as an intelligent peripheral device for auxiliary functions in an FPGA based system-on-chip design. Second, the very small size of Leros makes it an attractive softcore for many-core research with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented

基于Altera fpga 的软核 nios2的串口调试代码-Based on the Altera fpga soft core nios2 serial debug code