I2C slave设计代码

网上有类似的源码（dna_rd.v）但是有错误，里面第133行起，有两句没有放在begin end 里面，原本执行s6的状态机是有选择的进入s5或s7，而遗漏begin end 是直接进入s7，因此执行错误，dna读取全为0

fpga实验板上16*16点阵显示汉字的程序-翻译结果fpga实验板上16*16点阵显示汉字的程序(Experimental fpga board 16* 16 dot matrix display Chinese program- translation results fpga experimental board 16* 16 dot matrix display Chinese characters in the program)

This is a running 10 bit led on VHDL code including switch to shift from increasing or decreasing

这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)

Nonlinear discrete system identification, It uses a pulse of consumer law, Partial least squares method.

PLL 锁相环verilog程序 可以直接使用(The PLL can be used directly good use)

利用FPGA控制SRAM读写操作，清晰描写SRAM时序，工作原理。读写操作比较简单，一定要结合芯片的时序去写

实现x轴，y轴的两项脉冲控制，利用圆弧插补法，基于verilog语言编程，很好的实现插补算法。程序可以在modelsim中仿真，显示所需输入输出信号及clk时钟、start开始、busy终止信号

说明：  基于FPGA的QPSK系统仿真及验证，硬件部分。(Simulation and verification of QPSK system based on FPGA)

本文介绍一种波导双模双带滤波器的设计方法。(This paper presents a new class of dual-mode dualband filters in which each polarization is dedicated to a selected band. The equivalent circuit is a parallel combination of two inline networks that represent each polarization. A transmission zero is generated between the two bands by properly adjusting the relative orientations of the input and output coupling apertures.)