FPGA 的数字传输比

FPGA-CPLD实习计数器7段数码管控制接口设计与LED显示控制，FPGA译码(FPGA-CPLD internship counter 7-segment LED control interface design and LED display control, FPGA decoder)

4位的超前进位加法器，门级电路连接得到，verilog代码实现(4-bit look-ahead adder, gate-level circuit)

PWM整流器的死区延迟的VHDL编程，可以参考一下(VHDL programming PWM Rectifier dead-band delays)

用zynq实现片内的数模转换，基于最新的zynq平台(zynq xadc on FPGA arm)

基于fpga状态机的交通灯设计，亮灯时间自己修改，程序简单易懂。(Traffic light design based on FPGA state machine, light time self-modifying, the program is simple and easy to understand.)

verilog语言实现一个CPU，汇编程序实现汉明编码功能，输入11位代码，输出15位编码结果。(Verilog language to achieve a CPU, assembler to achieve Hamming coding function, enter 11 bit code, output 15 bit encoding results.)

本verilog代码通过IIC总线实现了对 PCF8591AD、DA转换芯片的控制。适用于FPGA，亲测可用。(this is used for FPGA to control PCF8591(AD/DA) chip by verilog.)

产生svpwm波形，可以参考下载,以便学习交流(gennerate SVPWM wave)

针对串行存储器M25P80应用的verilog程序-M25P80 serial memory for applications Verilog program

这里面有许多vhdl的例子，相信对这语言的初学者受益匪浅-There are many examples of vhdl, I believe that beginners benefit from this language