FPGA 的数字传输比

利 用 来 vhdl 设 计 p cm的 实 现-Vhdl design used for the realization of p cm

以太网的vhdl和verilog代码，供大家学习-Ethernet VHDL and Verilog code for everyone to learn

这是一个用vhdl语言实现的比较完整的ALU,可以用作其他cPU设计的部件-This is a vhdl language used to achieve complete ALU, can be used for other design components cPU

一个sram的源码程序，它是256kbx16bit的sram-An SRAM of the source program, it is the SRAM 256kbx16bit

辛辛苦苦的作品应用于DE2 的 开发。。希望对大家有用。-hard work for Dictyophora development. . We hope that the right useful.

完整的GMSK调制及维特比译码，程序中包括了高斯滤波器的设计，调制相位的计算，并采用了维特比译码算法解调出原始码元，最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)

FPGA通过AXI总线传输数据给ARM,ARM使用DMA方式接收数据！(FPGA to ARM Bridge design example)

verilog code for 8 bit alu

基于FPGA的16QAM调制器设计与实现(Design and implementation of 16QAM modulator based on FPGA)

many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation