设计问题

用pci9052开发pci板卡的全套资料,含有原理图封装,和eeprom文件1-PCI9052 development pci card with a complete set of data containing schematic package, and EEPROM file 1

这也是一个很不错的技术文档 关于FPGA-This is a very good technical documentation on the FPGA

详细介绍了基于DirectShow和RTP的网络视频监视系统设计与实现。-Detailed information on DirectShow and RTP-based network video surveillance system design and implementation.

100M光纤收发器的详细设计方案，该方案使用了IP113芯片，能实现100M速率的光纤信号到RJ45电信号的转换，该方案已经实现并通过了严格的测试-100M Fiber Transceiver detailed design program, which used the IP113 chips, can achieve speeds of 100M optical signal to electrical signal conversion RJ45, the program has been achieved through a rigorous testing

网站的功能需求分析，可以作为刚入行的新人进行参阅，写的还不错-Site analysis of functional requirements, can be used as new recruits to see, written in good

基于误差补偿的虚拟网格二维映射标定法. pdf 论文-Error compensation based on two-dimensional mapping of virtual grid calibration.

加深了解有关资源申请、避免死锁等概念，并体会和了解死锁和避免死锁的具体实施方法。 要求编写和调试一个系统动态分配资源的简单模拟程序，观察死锁产生的条件，并采用银行家算法，有效的防止和避免死锁的发生。 -deepen understanding of the application of resources to avoid deadlock concepts, and share and understand the deadlock and avoid the deadlock specific implementation methods. Prepared and debugging a system dynamic allocation of resources simple simulation program to observe the conditions Deadlock, Banker algorithm used effectively to prevent and avoid the deadlock occurred.

这篇论文描述了一种设计Hard Real Time System的结构方法HRT-HOOD，由York大学的两位教授提出，York大学的Real Time System Group是关于实时系统研究的世界领先机构，研究内容具体可以登陆York的网站，或者参考出版书籍：Real Time Systems and Programming Languages.-This paper describes a design Hard Real Time System Structure of HRT- HOOD, from York University Professor 2, York University"s Real Time System Group on the real-time system is the world"s leading research institutions, research specific content can be accessed York site, or reference the publication of books : Real Time Systems and Programming Languages.

介绍关于FPGA的浮点加法器运算单元设计-Information on floating-point FPGA-adder cell design computing

详细描述基于DSP的JPEG2000硬件压缩系统各个硬件的选择以及具体的实现过程.-Based on a detailed description of the JPEG2000 hardware compression DSP system hardware selection and implementation of concrete.