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100例VHDL语言解释,北京理工大学毕业…
VHDL语言100例详解,北京理工大学ASIC研究生出版,这里是51~94个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC publication, here is the 51 ~ 94 examples
- 2022-04-16 00:12:16下载
- 积分:1
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xilinx公司的FPGA实现数字视频信号处理器。语言是VHDL。
xilinx公司的FPGA实现数字视频信号处理器。语言是VHDL。-Xilinx FPGA to achieve the company
- 2022-10-21 12:30:03下载
- 积分:1
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OFDMSystemDesignandSimulation
OFDM通信系统设计与仿真(shuoshilunwen)(OFDM System Design and Simulation
)
- 2014-08-18 15:09:35下载
- 积分:1
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prac2
VHDL implementation using mouse and monitor
- 2009-06-28 20:10:56下载
- 积分:1
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fftverilog
关于FFT实现的Verilog代码,(FFT realize on the Verilog code,)
- 2008-02-28 14:02:22下载
- 积分:1
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Mano-CPU_VHDL-Implementation
Mano s cpu for Man s instructions
- 2012-04-28 01:04:57下载
- 积分:1
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VHDL achieve a frequency measurement of dollars, development environment for any...
一个vhdl实现的测频计,开发环境为任何支持vhdl语言的厂商提供的开发环境
-VHDL achieve a frequency measurement of dollars, development environment for any VHDL language support for manufacturers of the development environment
- 2022-01-28 17:39:53下载
- 积分:1
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可编程ASCII
说明: 写出13个简单的Verilog demon,适合初学者观摩学习。配合实验报告,食用更佳。(Write 13 simple Verilog demon, suitable for beginners to observe and learn. With the experimental report, it is better to eat.)
- 2020-12-28 18:59:02下载
- 积分:1
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uart_fifo
一份带有FIFO缓存的UART源码,采用verilog编写,实现批量数据的传输,数据缓存量可以通过修改源码中的FIFO的深度来改变。(This is a UART with FIFO. The UART is programmed using verilog, it can transmit or receive batch data. The amount of data buffered can be changed by changing the depth of FIFO.)
- 2021-04-25 22:38:46下载
- 积分:1
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zidong-shouhuoji
用VERILOG实现自动售货机功能,运行正确,希望有帮助(Use VERILOG implementation vending machine function, correct operation, hope to have help)
- 2014-01-05 20:42:49下载
- 积分:1