采用硬件描述语言Verilog HDL实现人回答功能，H.

adder 18b trong chuong trinh verilog

Syllabus for VSC-HVDC course

Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC

用max+plusII编写的vhdl程序 乒乓球游戏机-with max plusII vhdl procedures for the preparation of the table tennis game

fpga学习中常用的缩略语-commonly used abbreviations

PCIE仿真设计教程1-6，我帮大家收集到一起了(PCIE simulation design tutorial 1-6, I help you gather together.)

EDA中常用模块VHDL程序，不同时基的计数器由同一个外部是中输入时必备的分频函数。分频器FENPIN1/2/3(50分频=1HZ，25分频=2HZ，10分频=5HZ。稍微改变程序即可实现)-EDA VHDL modules commonly used procedure, the time- with a counter by the external input is required when the sub-frequency functions. Frequency Divider FENPIN1/2/3 (50 1HZ frequency = 25 = 2HZ-frequency, frequency = 10 points Stripper. A slight change in procedure can be realized)

IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY

中芯国际130nm库文件，在DC综合练习中可以使用，并能帮帮助理解库的含义-DC　Ｖｅｒｉｏｇ，已通过测试。 (SMIC 130nm library file, you can use in the DC Comprehensive Exercises, and help to help understand the meaning of the library-DC Veriog has been tested.)

计算燃料电池膜的传质分析，包括各层之间的氧气、二氧化碳以及水的传质。(Calculating cell mass transfer)