通信基带信号发生器的设计，采用单片机输入频率和波形，在FPGA中实现频率和波形生成...

任意奇数分频，只要修改N即可实现 可验证-Arbitrary odd-numbered sub-frequency, as long as the modified N can realize verifiable

Xilinx Spartan-3E Starter Kit Board User Guide(中文用户手册)(Xilinx Spartan-3E Starter Kit Board User Guide)

these are the source codes for the book " 100 power tips for FPGA designers"

基于FPGA的i2s接口输入模块设计，其中有原理图和verilog源码，可在Quartus环境下进行仿真(FPGA-based i2s interface input module design, including schematics and verilog source code, can be simulated in Quartus environment)

描述 Sramoc ( K , M ) 表示用数字0、1、2…、K-1组成的自然数中能被M整除的最小数。给定 K、M，求Sramoc ( K,M )。例如 K=2，M=7的时候，Sramoc( 2 , 7 ) = 1001。 输入 第一行为两个整数K、M满足2

基于单片机与CPLD的 等精度频率计，VHDL语言-Based on SCM and CPLD

DE2 altera board vhdl design

网上流传的用来实现FPGA驱动VGA，从而实现一个pingpong小游戏的源码，实测可用。(a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong. tested.)

New files for pudn website

vhdl设计事例,有助于FPGA初学着,High-Performance 1024-Point Complex FFT-vhdl design examples, to help novice FPGA. High-Performance 1024-Point Complex FFT