基于优先级的调度

用组合逻辑实现循环除法器。稳定、安全、可靠。(Combinational logic loop divider. Stable, secure, and reliable.)

FPGA_CPLD-SHC多款FPGA CPLD开发板的原理图，很好的线路设计参考(FPGA_CPLD-SHC Variety of FPGA CPLD development board schematics, a good reference circuit design)

说明：  基于quartus2的jk触发器设计，内含源码和仿真图(Jk flip-flop design based on the quartus2, containing source code and simulation diagram)

这个是用VHDL实现FPGA对FLASH的读写。(This is achieved using VHDL FLASH FPGA to read and write.)

lite pcie 的程序，参考demo可以用来熟悉pcie axi-lite方式

74ls165电路源代码verilog,已经验证。(74ls165 verilog)

控制步进电机转动，正反转，旋转角度完美掌握。很好用，亲测(Control stepping motor rotation, positive and negative rotation, perfect control of rotation angle. Very easy to use, personal test)

说明：  基于FPGA的用verilog语言写的，改程序可产生不同调制系数和不同频率的AM波，长按按键切换调制度25 、50 、75 和短按按键切换调制信号频率1k、1.5k、2k、2.5k.(Based on the FPGA using verilog language, change the program can produce different coefficients and different frequency modulated AM wave, long press the button to switch the modulation of 25 , 50 , 75 and short press button to switch the modulation signal frequency 1k, 1.5k, 2k, 2.5k.)

VHDL语言编写的I2C通信接口,可与单片机等MCU相连,只占用很少的引脚线完成数据的传输(Written in VHDL I2C communication interface, such as MCU and MCU can be connected, only takes a few lines to complete the data transmission pin)

说明：  HDMI做为视频输出输入接口已经广泛使用很长时间，主要通过TMDS差分编码传输。本实验通过在HDMI屏幕上显示彩条和输入输出环通实验，来练习视频的时序和视频颜色的表示，为后面视频处理实验做个基础。(HDMI as video output input interface has been widely used for a long time, mainly through TMDS differential coding transmission. In this experiment, by displaying color bars and input/output loop experiments on HDMI screen, video timing sequence and video color representation are practiced to lay a foundation for video processing experiments later)