一个模拟视频输入转VGA视频输出的Verilog程序，视频解码芯片采用ADV7181B，VGA DAC采用ADV7123，强力推荐...

说明：  verilog编写的RS485读写驱动程序(RS485 read-write driver written by Verilog)

R S编 解 码 实 现 代 码 verilog语言(RS CODE AND ENCODE)

利用分频可以产生一系列脉冲，根据输入脉冲的不同决定你得到的一系列脉冲频率-The use of sub-band can produce a series of pulses, according to input pulse of different decisions you have a series of pulse frequency

自己编写的，浮点数与整数之间的转换的Verilog HDL实现(Written by myself, it is converted into Verilog HDL integer floating point implementation)

VGA controller : Genarate a VGA signal from your inout information as color info of each pixel

VHDL入门级好教材《VHDL开发精解与实例剖析》(VHDL development solution with fine examples of analysis)

CPFSK Demodulation Techniques

说明：  FPGA实现Jpeg压缩，和视频采集程序(Zynq - Main - register access Mio)

说明：  一个解决除法溢出的例子，可以学习到很多，注释很详细(A solution to the division overflow example, you can learn a lot, very detailed notes)

基于脉动结构的有限域乘法器，verilog代码(Based on the pulse of the structure of finite field multipliers, verilog code)