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tcd1209+AD994的FPGA驱动代码
按照手册驱动线阵CCDTCD1209和AD9945,驱动频率10M,板卡时钟30MHz,经PLL分频后输入驱动,该程序在altera cyclone IVE上验证通过
- 2022-02-10 07:25:35下载
- 积分:1
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src
说明: 基于FPGA的w5300开发代码,使用与w5300芯片,目前代码已经经过长期测试(W5300 development code based on FPGA, using W5300 chip, the code has been tested for a long time)
- 2020-03-11 16:04:41下载
- 积分:1
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cfo_correction
说明: OFDM载波同步,Verilog编写,完全正确!!!(verilog )
- 2020-11-05 21:39:50下载
- 积分:1
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DisplayPort Link training optimization
说明: 介绍了Displayport规格中lind training的背景研究,设计和实现。(As the requirement for bandwidth continues to increase in the video market, retaining
the signal integrity becomes increasingly more difficult. For many of todays
commonly used video interfaces, there are devices that can be used to assist in this
matter. However, the use of such a device is only partially documented in the DisplayPort
specification for the receiving image device, which means that the receiving
side of the video link is free to choose its own implementation. This report presents,
together with background research and design decisions, a suggestion for such an
implementation. This implementation would need to be compatible towards a wide
range of possible video Source devices and DisplayPort cables.)
- 2021-01-11 16:48:49下载
- 积分:1
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FPGA开发全攻略
FPGA设计攻略及流程,包含时序收敛和引脚约束(FPGA design strategy and process, including time series convergence and pin constraints)
- 2017-12-12 16:30:52下载
- 积分:1
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My-Simple-Specturm--Analyzer
基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)
- 2013-11-13 08:45:40下载
- 积分:1
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dianzhen
如果需要用verilog设计一项比较简单的功能,那么这个浅显易懂的程序能让你很快明白点阵的设计方法,尤其是对那些初学者(If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners)
- 2014-01-16 16:13:53下载
- 积分:1
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weitongbu
基于fpga的位同步信号提取仿真 使用vhdl语言 quartus(To use vhdl language quartus fpga bit synchronization signal extraction-based simulation)
- 2020-12-29 17:29:00下载
- 积分:1
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sound_ranging
改VHDL代码可以实现超声波测距的功能,其精确度达到US级,可以用七段数码管显示其数值(sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging )
- 2014-06-13 20:42:03下载
- 积分:1
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CodedLOCK
基于FPGA的电子密码锁设计与实现,语言是VHDL语言,有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
- 2013-08-27 21:37:06下载
- 积分:1