出租车记价器，使用vhdl语言编写的源码及其仿真。

vhdl的源文件调试 ！！！！！！！！ flv视频-VHDL source file debugging! ! ! ! ! ! ! ! flv video

早迟门（early late gate），比特同步算法，该文档详细的说明了早迟门算法的原理以及具体的实现步骤(Early late gate (early late gate), bit synchronization algorithm, the document explains in detail the principles of early-late gate method and the specific implementation steps)

this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga

异步fifo实现，通过双口ram实现异步fifo(Asynchronous FIFO implementation, through dual port RAM to achieve asynchronous FIFO)

说明：  基于fpga的spi通信测试 可与stm32进行spi通信测试(SPI communication test based on FPGA can test SPI communication with stm32)

VHDL implementation using mouse and monitor

介绍如何使用vivado来调用和封装IP核，测试AXI4总线的三种功能协议。(It describes how to use vivado to call and package IP core test three functions AXI4 bus protocol.)

一个可用的很不错的DDS 频率合成程序，用VHDL语言编写-Available is a good DDS frequency synthesis procedures, using VHDL language

source vhdl code of D flipflop logic

xilinx FPGA技术详解,从设计流程到设计注意点(xilinx FPGA technology Detailed Design points, from the design process to)